College of Engineering › Electrical and Computer Engineering › Directory › Bios › Larry Pileggi

Larry Pileggi

Coraluppi Head and Tanoto Professor, Electrical and Computer Engineering

Contact

1106 Hamerschlag Hall
pileggi(through)ece.cmu.edu
412-268-6774
412-268-5787

Address 5000 Forbes Avenue
Pittsburgh, PA 15213

Bio

Lawrence Pileggi is the Coraluppi Head and Tanoto Professor of electrical and computer engineering at Carnegie Mellon University, and has previously held positions at Westinghouse Research and Development and the University of Texas at Austin. He received his Ph.D. in Electrical and Computer Engineering from Carnegie Mellon University in 1989. He has consulted for various semiconductor and EDA companies, and was co-founder of Fabbrix Inc., Extreme DA, and Pearl Street Technologies. His research interests include various aspects of digital and analog integrated circuit design, and simulation, optimization and modeling of electric power systems. He has received various awards, including Westinghouse corporation’s highest engineering achievement award, a Presidential Young Investigator award from the National Science Foundation, Semiconductor Research Corporation (SRC) Technical Excellence Awards in 1991 and 1999, the FCRP inaugural Richard A. Newton GSRC Industrial Impact Award, the SRC Aristotle award in 2008, the 2010 IEEE Circuits and Systems Society Mac Van Valkenburg Award, the ACM/IEEE A. Richard Newton Technical Impact Award in Electronic Design Automation in 2011, the Carnegie Institute of Technology B.R. Teare Teaching Award for 2013, and the 2015 Semiconductor Industry Association (SIA) University Researcher Award. He is a co-author of "Electronic Circuit and System Simulation Methods," McGraw-Hill, 1995 and "IC Interconnect Analysis," Kluwer, 2002. He has published almost 400 conference and journal papers and holds 40 U.S. patents. He is a fellow of IEEE.

Education

Ph.D., 1989
Electrical and Computer Engineering
Carnegie Mellon University

M.S., 1984
Electrical Engineering
University of Pittsburgh

B.S., 1983
Electrical Engineering
University of Pittsburgh

Research

Power Systems

The planning, real-time monitoring and security of future power grids requires modeling and analysis capabilities beyond those available presently. Existing models are becoming obsolete as new technologies such as renewables and power electronic based devices become more prevalent, and traditional power flow simulation algorithms lack the robustness and scalability that is needed to represent combined transmission and distribution systems over all dynamics and contingencies. Our work is based on a unique equivalent split circuit formulation that that enables adaptation and application of techniques that were developed for circuit simulation to robustly analyze power grids. Our software tool, SUGAR, provides a foundation for: i) incorporating transmission and distribution models that capture true physics behavior; ii) unifying steady state, dynamics and transient analyses; iii) assessing feasibility and solution of optimal power flow conditions.

Integrated Circuits

While the end of CMOS scaling is now in sight, the advancement of integrated circuits and systems remains a top priority for the electronics industry. A significant portion of our research has been focused on methodologies that support affordable design in sub-20nm CMOS technologies, but much of that work also includes opportunistic integration of emerging heterogeneous technologies that are compatible with the CMOS. We further explore use of emerging materials and devices (e.g. magnetics, resistance change, phase change, etc.) that provide new computational or storage capabilities when configured in new forms, or applied to specific architectures. Several of our projects target specific system applications in domains such as brain and human interfaces.

Secure Hardware

With the continued off-shoring of advanced integrated circuit (IC) manufacturing facilities, the ability to fully secure the IC manufacturing supply chain is increasingly challenging. While commercial-off-the-shelf (COTS) programmable solutions such as FPGAs and microprocessors are a viable alternative to a custom ASIC (application specific integrated circuit), it is generally at a significant cost in terms of performance-at-power (PaP). Our research is toward developing methods to design and fabricate ICs in untrusted supply chains while keeping the sensitive IP from the manufacturer. We further consider techniques to mitigate a malicious third party’s ability to alter the design during manufacturing, along with making it more difficult for others to perform in-the-field reverse engineering of critical IP.