Ken Mai
Principal Systems Scientist, Electrical and Computer Engineering
Bio
Ken Mai received his B.S., M.S., and Ph.D. degrees in electrical engineering from Stanford University. He is currently a Principal Systems Scientist in the Electrical and Computer Engineering Department at Carnegie Mellon University. His research interests are in high-performance circuit design, secure IC design, radiation hardening by design, reconfigurable computing, and computer architecture. He was the recipient of an NSF CAREER award, the George Tallman Ladd Research Award, and the Eta Kappa Nu Excellence in Teaching Award. He is a member of Phi Beta Kappa and IEEE.Education
Ph.D., 2005
Electrical Engineering
Stanford University
M.S., 1997
Electrical Engineering
Stanford University
B.S., 1993
Electrical Engineering
Stanford University
Research
With process technologies scaling into the nanometer regime, the underlying implementation technology increasingly affects architecture and circuit design. We must adapt and reinvent current designs to circumvent technology constraints (e.g. interconnect delay, device leakage, soft-errors, device mismatch) and to target emerging applications (e.g. sensor networks, computational biology). The key near-term challenge is to build compute systems that can efficiently achieve high-performance, yet remain economically feasible, general-purpose, and easy to program. In the long-term, with CMOS scaling approaching fundamental limits, the challenge will be to build efficient, high-performance, reliable computation systems from technology building blocks that may be radically different from those we use today.
My primary research interest is the circuit design of efficient, high-performance digital blocks (i.e. memories and functional units) in future generation technologies. Further, I'm interested in building tools to export VLSI-level design information and constraints to architectural-level design.
Keywords
- Digital circuit design
- Computer architecture
- Memory design
- Reconfigurable computing
- Secure hardware
- Secure IC design