CMU 18-447: Introduction to Computer Architecture |
Course Schedule
Spring 2009
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Interface,
Fourth Edition by Patterson and
Hennessy, Morgan Kaufmann/Elsvier.) You may also find it
helpful to preview lecture notes from Spring 2008
before class. There will be additional assigned readings
from research papers.
Part 1: L1~L7 = Computer
Basics
Part 2: L8~L15 = Processor
Design
Part 3: L18~L23 = Memory
System &
���������� L22 = I/O System &
���������� L23~L25 = Multicore and MP
systems
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Week |
Date |
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Meetings |
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|
HW |
Lab |
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1 |
1/12 |
|
Introduction |
|
P&H Ch1 |
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|
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|
1/14 |
|
Computer Arithmetic: Adders |
|
P&H Ch3 |
|
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2 |
1/19 |
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No classes (Martin Luther
King, Jr. Day) |
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Lab1 |
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|
1/21 |
|
Verilog RTL Review in class |
|
(Optional
P&H App. C) |
HW1 out |
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|
3 |
1/26 |
|
Computer Arithmetic:
Multipliers |
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|||
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|
1/28 |
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Floating Point |
|
P&H Ch3 |
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4 |
2/2 |
|
ISA Design |
|
P&H Ch2 (Optional
P&H App. E) |
HW1 due HW2 out |
Lab2 |
|
|
|
2/4 |
|
MIPS ISA |
|
P&H Ch2 (Optional
P&H App. B) |
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5 |
2/9 |
|
Performance and Cost |
|
P&H Ch1.5
and 1.7 |
|
||
|
|
2/11 |
|
Single-Cycle Implementation |
|
P&H
Ch4.1~4.4 |
HW2 due |
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6 |
2/16 |
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|
Midterm 1: in
class |
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|
|
Proj1 |
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|
2/18 |
|
Multi-Cycle Implementations
|
|
P&H Appendix
D |
|
||
|
7 |
2/23 |
|
Pipelining: Basics |
|
P&H
Ch4.5~4.6 |
HW3 out |
||
|
|
2/25 |
|
Pipelining: Data Hazard and� Resolution |
|
P&H Ch4.7 |
|
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|
8 |
3/2 |
|
Pipelining: Control Hazard
and Resolution |
|
P&H Ch4.8 |
|
Proj2 |
|
|
|
3/4 |
|
Pipelining: Branch
Prediction |
|
P&H Ch4.8 |
HW3 due |
||
|
|
3/6 |
|
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Mid-Semester Break |
|
|
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3/9 |
|
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No classes (Spring Break) |
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|
3/11 |
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|
No classes (Spring Break) |
|
|
|
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9 |
3/16 |
|
Pipelining: Exceptions |
|
P&H Ch4.9 |
|
||
|
|
3/18 |
|
Modern CPU Design |
|
Rest of P&H
Ch4 |
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|
10 |
3/23 |
|
Memory Technology and
Organization |
|
P&H Ch5 |
|
Proj3 |
|
|
|
3/25 |
|
Caches |
|
P&H
Ch5.2~5.3 |
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|
11 |
3/30 |
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|
Midterm 2: in
class |
|
|
|
Proj4 |
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|
4/1 |
|
Multithreading and Multicore + Project 4 Kick-Off |
|
|
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|
12 |
4/6 |
|
More caches |
|
P&H
Ch5.4~5.6 |
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|
4/8 |
|
VM: protection and paging |
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|
HW4 out |
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|
13 |
4/13 |
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VM: page tables and TLB |
|
Rest of P&H
Ch5 |
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|
4/15 |
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VM: modern systems |
|
P&H Ch6 (Optional
P&H Ch9) |
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|
4/16-18 |
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|
Spring Carnival |
|
|
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|
14 |
4/20 |
|
Cache Coherence |
|
P&H Ch5.8 |
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4/22 |
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Multicore Processors |
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|
HW4 due |
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|
15 |
4/27 |
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Busses |
|
P&H Ch7 |
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|
4/29 |
|
I/O |
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5/7 |
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Final Exam, Thursday,
5:30-8:30p.m, BH 136A |
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